1,936 research outputs found

    Digital Implementation of SISC Fuzzy Controllers

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    A classification of inference systems based on approximate reasoning techniques is proposed. An alternative realization method is described for the particular SISC case, which enables reducing the silicon area and increasing the operation speed, making it especially appropriate for real time control applications

    Aplicación de técnicas de interpolación basadas en lógica difusa al procesado de imágenes de video

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    Comunicación presentada al "IWS'2007" celebrada en Lima (Perú) del 14 al 16 de Marzo de 2007.Muchas tareas básicas de procesado de imágenes requieren la manipulación de grandes volúmenes de información que, en ocasiones, puede resultar ambigua y/o imprecisa como consecuencia de las características propias de las imágenes (gran cantidad de detalles con grandes contrastes de valores de luminancia y secuencias con un elevado grado de movimiento) o de los defectos de las mismas (presencia de ruido, falta de nitidez, etc.). En esta comunicación se analizan nuevas técnicas de interpolación basadas en lógica difusa que proporcionan soluciones eficaces para dos aplicaciones típicas de procesado de imágenes: el desentrelazado de señales de vídeo y el incremento de resolución de imágenes.Peer reviewe

    Microelectronics implementation of directional image-based fuzzy templates for fingerprints

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    Trabajo presentado al ICM celebrado en El Cairo del 19 al 22 de diciembre de 2010.Fingerprint orientation image, also called directional image, is a widely used method in fingerprint recognition. It helps in classification (accelerating fingerprint identification process) as well as in preprocessing or processing steps (such as fingerprint enhancement or minutiae extraction). Hence, efficient storage of directional image-based information is relevant to achieve low-cost templates not only for “match on card” but also for “authentication on card” solutions. This paper describes how to obtain a fuzzy model to describe the directional image of a fingerprint and how this model can be implemented in hardware efficiently. The CAD tools of the Xfuzzy 3 environment have been employed to accelerate the fuzzy modeling process as well as to implement the directional image-based template into both an FPGA from Xilinx and an ASIC.Peer Reviewe

    XFVHDL4: A hardware synthesis tool for fuzzy systems

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    This paper presents a design technique that allows the automatic synthesis of fuzzy inference systems and accelerates the exploration of the design space of these systems. It is based on generic VHDL code generation which can be implemented on a programmable device (FPGA) or an application specific integrated circuit (ASIC). The set of CAD tools supporting this technique includes a specific environment for designing fuzzy systems, in combination with commercial VHDL simulation and synthesis tools. As demonstrated by the analyzed design examples, the described development strategy speeds up the stages of description, synthesis, and functional verification of fuzzy inference systems.Comunidad Europea FP7-IST-248858Ministerio de Ciencia e Innovación TEC2008-04920Junta de Andalucía P08-TIC-0367

    FLEB: A fuzzy logic e-book

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    FLEB is an electronic book which attempts to introduce the basic mathematical foundations and applications of fuzzy logic through a software environment which includes images, hypertext, sensitive elements, animations and interactive demos. It also allows executing Xfuzzy, a development tool which eases the description, verification, and synthesis of fuzzy logic-based systems. FLEB, like a usual book, is structured into chapters with pages through which the reader can navigate comfortably. In addition, the information provided can be accessed in a non sequential way thanks to the hypertext and sensitive elements that interconnect linked pages. This capability of non sequential reading together with the exploitation of multimedia software make FLEB a good tool to pedagogically show and explain the basis of fuzzy logic theory and applications.Peer reviewe

    Side-channel analysis of the modular inversion step in the RSA key generation algorithm

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    This paper studies the security of the RSA key generation algorithm with regard to side-channel analysis and presents a novel approach that targets the simple power analysis (SPA) vulnerabilities that may exist in an implementation of the binary extended Euclidean algorithm (BEEA). The SPA vulnerabilities described, together with the properties of the values processed by the BEEA in the context of RSA key generation, represent a serious threat for an implementation of this algorithm. It is shown that an adversary can disclose the private key employing only one power trace with a success rate of 100 % – an improvement on the 25% success rate achieved by the best side-channel analysis carried out on this algorithm. Two very different BEEA implementations are analyzed, showing how the algorithm’s SPA leakages could be exploited. Also, two countermeasures are discussed that could be used to reduce those SPA leakages and prevent the recovery of the RSA private keyPeer reviewe

    Un algoritmo en tiempo real para etiquetado de componentes conectados en imágenes

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    Esta comunicación presenta un algoritmo de dos pasadas para el etiquetado en tiempo real de los componentes conexos en una imagen. El algoritmo propuesto es una buena opción frente a otras alternativas de dos y múltiples pasadas ya que ha sido diseñado considerando que su implementación en FPGAs ofrezca un buen compromiso entre recursos ocupados y velocidad de operación. Se describen dos implementaciones hardware de este algoritmo, cuyo desarrollo se ha llevado a cabo siguiendo un flujo de diseño basado en la herramienta System Generator de Xilinx.Comunidad Económica Europea MOBY-DIC FP7-IST- 248858Ministerio de Ciencia e Innovación (España) TEC2008-04920Junta de Andalucía P08- TIC-03674Fondos Feder P08- TIC-0367

    Hardware/software codesign methodology for fuzzy controller implementation

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    This paper describes a HW/SW codesign methodology for the implementation of fuzzy controllers on a platform composed by a general-purpose microcontroller and specific processing elements implemented on FPGAs or ASICs. The different phases of the methodology, as well as the CAD tools used in each design stage, are presented, with emphasis on the fuzzy system development environment Xfuzzy. Also included is a practical application of the described methodology for the development of a fuzzy controller for a dosage system

    Microelectronics implementation of directional image-based fuzzy templates for fingerprints

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    Fingerprint orientation image, also called directional image, is a widely used method in fingerprint recognition. It helps in classification (accelerating fingerprint identification process) as well as in preprocessing or processing steps (such as fingerprint enhancement or minutiae extraction). Hence, efficient storage of directional image-based information is relevant to achieve low-cost templates not only for “match on card” but also for “authentication on card” solutions. This paper describes how to obtain a fuzzy model to describe the directional image of a fingerprint and how this model can be implemented in hardware efficiently. The CAD tools of the Xfuzzy 3 environment have been employed to accelerate the fuzzy modeling process as well as to implement the directional image-based template into both an FPGA from Xilinx and an ASIC

    Tuning of a hierarchical fuzzy system for video de-interlacing

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    The tuning of hierarchical fuzzy systems are not supported by the majority of CAD tools available at the market currently. The xfsl tool integrated into Xfuzzy 3 allows the tuning of complex fuzzy systems, for instance, hierarchical systems with modules in cascade. The authors propose the use of this tool for tuning a complex fuzzy system for video deinterlacing in this paper. The parameters obtained after tuning are proven by de-interlacing a wide battery of sequences. The use of tuning techniques improves the quality of de-interlacing and provides an algorithm simplification that facilitates its hardware implementatio
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